Packaged ICs are usually tested by way of a test socket or test socket/carrier combination. Many such test sockets utilize a lid or cover plate which serves the purpose of positioning and holding the ICs in place such that intimate contact is made between the IC leads and the test socket contact pins. The lid will also allow for quick insertion and removal of the IC.
Most prior designs include a lid which is either hinged to the test socket base along one edge or clipped to the test socket base along several edges, both of which are intended to clamp the IC down onto the contact pins of the test socket as the lid is closed. Unfortunately, during closure it has been found that the hinged or clipped lid concept results in a dynamic component of force being exerted in a non-normal direction. The normal direction is indicated by a vector perpendicular to the plane of the test socket. Furthermore, the magnitude of this component will vary as a function of the hinge angle or clip arrangement. As IC lead and contact pin counts increase with newer generations of ICs, both the leads and pins become finer and thus more fragile. Any applied force in other than the normal direction will tend to deform or otherwise decrease pin life. This is a constant problem in industries such as computer manufacturing in which large numbers of very complex, high pin count ICs are used.
Most prior designs include lids which incorporate a lever, spring, screw, or other mechanism for pressing the IC down onto contact pins in the base of the test socket to make electrical contact between the leads of the IC and the pins of the test socket. In these prior art designs, the applied force to press the IC down onto the contact pins and the dimension between the test socket pins and the lid are both mechanically fixed. This results in a contact force between the IC leads and test socket pins determined in part by the mechanical tolerances of subassemblies (i.e.,test socket, test socket lid with pressure mechanism, IC carrier, as well as the IC itself). The applied force for a given IC and test socket configuration cannot be adjusted easily.
An inherent weakness in the prior art design of IC test sockets is the inability to compensate for the mechanical tolerances of the subassemblies. For example, for a given test socket over a distribution of carriers and integrated circuits there exist a range of thinner IC/carrier combinations whereby a loose fit may result which would lead to marginal (high resistance) or no (open circuit) contact between some IC leads of the IC under test and the pins of the test socket. Another example is that for thicker IC carrier combinations, the pressing force will become extremely large resulting in gouged IC leads, bent test socket pins, or test socket pins that over-travel in their compressed state and lose elasticity. When the next ICs are tested, the bent, deformed or non-elastic test socket pins will not make electrical/mechanical contact to all the IC leads under test. This results in some IC leads showing high resistance or open circuit, indicating defective ICs when in fact it is unreliable test socket connections. A test socket that becomes progressively more unreliable with use is a major concern in all testing environments.